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VIA annoncerer High-Bandwidth Differential Interconnect Technology

Skrevet af Kenneth Ikast Jacobsen | 07-08-2000 17:34 | 1758 visninger | 0 kommentar
VIA har annonceret en ny teknologi, som deres fremtidige chipsets vil benytte.
VIA unveils High-Bandwidth Differential Interconnect Technology (HDIT)
Architecture for next generation of VIA Apollo Chipsets

Provides flexible baseline mainstream PC platform that can be scaled to meet
high bandwidth requirements for multiprocessor workstations & servers

Taipei, Taiwan, August 7th, 2000 -- VIA Technologies, Inc, the world's
leading fabless supplier of PC core logic chipsets, microprocessors, and
multimedia and communications chips, today unveiled its advanced new
scaleable HDIT (High-Bandwidth Differential Interconnect) Architecture for
its next generation of VIA Apollo DDR chipsets.

VIA's HDIT Architecture provides a cost-effective yet highly flexible
baseline platform that allows System OEMs to integrate such advanced
features as a DDR266 memory interface, AGP4X, and VIA's new 512MB per
second V-Link bus to a highly-integrated HDIT South Bridge in mainstream
desktop and mobile PC designs. To ensure the scalability that System OEMs
require for high-end multi-processor workstation and server designs, the
memory interface and AGP port in the HDIT North Bridge can also be
configured in HDIT Mode to double or even quadruple memory data bandwidth to
rates as high as 4.2GB per second.

VIA's HDIT Architecture
VIA's HDIT Architecture features a high-performance HDIT North Bridge chip
with a high-speed DDR266 memory controller interface, AGP 4X, and support
for up to four processors. For high-end workstation and server applications,
System OEMs can configure the memory interface in HDIT mode and utilize it
in conjunction with HDIT Memory Buffers to boost memory bandwidth to rates
of up to 4.2GB per second with a 128-bit data path. The data transfer rate
from the HDIT North Bridge to the AGP port and I/O expansion slots can also
be increased to speeds of up to 2.1GB per second by configuring the system
in HDIT mode and integrating two additional 64-bit HDIT PCI-X companion
chips.

To ensure a balanced system architecture, VIA is coupling its HDIT North
Bridge chip with a new enhanced legacy-free HDIT South Bridge featuring a
wide range of integrated functions including dual ATA-100 EIDE controllers,
8-channel HW accelerated Audio and HSP modem, six port USB, integrated
networking, and an LPC (Low Pin Count) bus running at 66MHz.
Vi kan jo kun se frem til VIA's næste generations chipsets, der forhåbentlig vil gøre det muligt at udnytte AMDs Athlon processor optimalt, og samtiig få en god platform med DDR-SDRAM til Intels Pentium III processor. Du kan læse hele pressemeddelsen her.

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